The present invention relates to a phase-change memory device.
Phase-change memory devices have a nonvolatile characteristic, and thus maintain data stored therein even when not powered. Furthermore, although they are nonvolatile memory devices, the phase-change memory devices have a data processing speed of a random access memory (RAM) device that is a volatile memory device.
FIG. 1a and FIG. 1b are views illustrating a phase-change resistor 4 included in a phase-change memory device. Referring to FIG. 1a and FIG. 1b, the phase-change resistor 4 is composed of an upper electrode 1, a lower electrode 3, and a phase-change material 2 sandwiched between the upper electrode 1 and the lower electrode 3. When applying a voltage to the upper electrode 1 and the lower electrode 3, electric current flows through the phase-change material 2 to vary a temperature thereof, and thus an electric conductive state thereof changes.
FIG. 2a and FIG. 2b are views illustrating a data storage principle of the phase-change resistor 4. If an electric current less than a threshold value flows through the phase-change resistor 4, the phase-change material 2 is crystallized. When the phase-change material 2 is crystallized, it becomes a material having low resistance. As a result, an electric current can flow between the upper electrode 1 and the lower electrode 3.
Meanwhile, referring to FIG. 2b, if an electric current equal to or greater than the threshold value flows through the phase-change resistor 4, the phase-change material 2 has a temperature greater than a melting point thereof. When the phase-change material 2 melts to become an amorphous phase, it becomes a material having high resistance. As a result, it is difficult for an electric current to flow between the upper electrode 1 and the lower electrode 3.
Accordingly, the phase-change resistor 4 may store two different data corresponding to the forgoing two states. For example, the phase-change resistor 4 can use a low resistance state to represent data of a logical ‘1’ and a high resistance state to represent data of a logical ‘0’. Furthermore, because the state of the phase-change material 2 does not vary even when the phase-change memory device is not powered, the data can be stored in a nonvolatile pattern.
FIG. 3 is a graph illustrating a write operation of a phase-change resistive cell including the phase-change resistor 4. Referring to FIG. 3, when an electric current flows between the upper electrode 1 and the lower electrode 3 of the phase-change resistor 4 for a predetermined time, heat is generated. When an electric current less than a threshold value flows for a predetermined time, the phase-change material 2 is crystallized under a low temperature heating condition. Consequently, the phase-change resistor 4 becomes a set state.
Conversely, when an electric current equal to or greater than the threshold value flows through the phase-change resistor 4, the phase-change material 2 becomes an amorphous state under a high temperature heating condition. As a result, the phase-change resistor 4 becomes a reset state.
To write the set state in the write operation through the use of the above features, a low voltage is applied to the phase-change resistor 4 for a long time.
Conversely, to write the reset state in the write operation, a high voltage is applied to the phase-change resistor 4 for a short time.
Meanwhile, during a sensing operation, a sensing current is provided to the phase-change resistor 4, thereby sensing data stored in the phase-change resistor 4.
In a sensing circuit of the phase-change memory device, a power source voltage is required to generate the sensing current.
In general, since a power supply circuit supplying the power source voltage into the nonvolatile phase-change memory device supplies the power source voltage regardless of the activation of the sensing operation, power consumption increases.
Furthermore, in the conventional phase-change memory device, if a surrounding temperature of an internal circuit varies, the timing of the power source voltage supplied also varies.
Since, however, the conventional phase-change memory device controls internal control signals regardless of the temperature variation, if the surrounding temperature varies, a delay may occur in the operational timing of the internal control signals.